1. Field of the Invention
The present invention relates to an image capture device in which a captured image has an improved image quality, and to a controller of such an image capture device.
2. Description of the Related Art
FIG. 17 shows a structure of an image capture device 100 including a CCD solid state image capture element. The image capture device 100 includes a CCD solid state image capture element 102, a timing control circuit 104, and a driver circuit 106. The CCD solid state image capture element 102 has an image capture section 2i, a storage section 2s, a horizontal transfer section 2h, and an output section 2d. In response to a clock pulse having a predetermined frequency and an external control signal, the timing control circuit 104 generates a control signal for use in controlling the image capture, vertical transfer, horizontal transfer, and output of the CCD solid state image capture element 102. The control signal is input to the driver circuit 106. In response to the control signal generated from the timing control circuit 104, the driver circuit 106 outputs a clock pulse at a necessary time to each of the image capture section 2i, the storage section 2s, the horizontal transfer section 2h, and the output section 2d of the CCD solid state image capture element 102.
In response to the clock output from the driver circuit 106, the CCD solid state image capture element 102 performs image capture, vertical transfer, horizontal transfer, and output. In the image capture section 2i, light receiving pixels constituting respective bits are arranged in a two-dimensional matrix. Light incident on the image capture section 2i is subjected to photoelectric conversion in the light receiving pixels so that information charges are generated. Application of a vertical transfer clock causes vertical shift registers of the image capture section 2i to transfer the two-dimensional array of information charges generated in the image capture section 2i to the storage section 2s at high speed. As a result, information charges for one frame are held in vertical shift registers of the storage section 2s. Then, the information charges are transferred from the storage section 2s to the horizontal transfer section 2h in units of one line. Further, application of a horizontal transfer clock causes transfer of the information charges from the horizontal transfer section 2h to the output section 2d in units of one pixel. The output section 2d converts the amount of charge for each pixel to a value of voltage, and outputs the change in the value of voltage as an output of the CCD.
The image capture section 2i and the storage section 2s include vertical shift registers in which a plurality of channel regions extend in parallel with each other in a vertical direction (corresponding to the longitudinal direction of the CCD solid state image capture element 102 shown in FIG. 17) and a plurality of transfer electrodes intersect the channel regions. Each bit of the shift registers functions as one of the light receiving pixels arranged in the two-dimensional matrix.
As shown in FIGS. 18A to 18C, the image capture section 2i has a structure in which a plurality of shift registers are formed in a surface region of a semiconductor substrate 9. FIG. 18A is a schematic plan view showing a part of a related art image capture section 2i, and FIGS. 18B and 18C are cross-sectional side views taken along lines A-A and B-B, respectively, of FIG. 18A.
As shown in FIG. 18B, a P well 11 doped with a p-type impurity is formed in the n-type semiconductor substrate 9. An N well 12 highly doped with an n-type impurity is formed in a surface region on the P well 11. The term “surface region” as used herein refers to a region near the surface of the semiconductor substrate 9. In order to separate the channel regions of the vertical shift registers, separation regions 14 consisting of p-type impurity regions are formed by ion implantation of a p-type impurity in parallel with each other at predetermined intervals in the N well 12. Adjacent separation regions 14 are used to electrically divide the N well 12 so that a region existing between the separation regions 14 constitutes a channel region 22, that is, a transfer path for transferring information charges. The separation regions 14 form potential barriers between adjacent channel regions, and electrically separate the channel regions 22.
An insulating film 13 is formed on the surface of the semiconductor substrate 9. A plurality of transfer electrodes 24 formed of polysilicon films are arranged in parallel with each other so as to intersect the extending direction of the channel regions 22 at right angles, with the insulating film 13 being interposed between the channel regions 22 and the transfer electrodes 24. With reference to the related art image capture section 2i, a group of three adjacent transfer electrodes 24-1, 24-2, and 24-3 constitutes one pixel.
FIG. 19 shows a state of potential distribution within the N well 12 along a channel region 22 during image capture. For capturing an image, one transfer electrode 24-2 of each group of transfer electrodes 24 is turned on, and potential wells 50 are formed in the channel region 22 below the transfer electrodes 24-2. By turning off the other transfer electrodes 24-1 and 24-3, information charges are stored in the potential wells 50 formed below the turned-on transfer electrodes. During transfer, as shown in FIG. 20, transfer clocks φ1, φ2, and φ3 of three phases are applied to each combination of three transfer electrodes 24-1, 24-2, and 24-3 constituting one pixel. Thus, the potential in the channel region 22 extending below the transfer electrodes 24-1, 24-2, and 24-3 is controlled to transfer information charges.
Similarly to the image capture section 2i, the storage section 2s also includes vertical shift registers. The vertical shift registers included in the storage section 2s are shielded from light, and each bit of the shift registers functions as one of storage pixels that store information charges.
In addition, as shown in FIG. 6, a CCD solid state image capture device intended for capturing color images includes two types of columns of color filters: columns having red (R) transmitting filters and green (G) transmitting filters arranged alternately along the vertical transfer direction, and columns having green (G) transmitting filters and blue (B) transmitting filters arranged alternately along the vertical transfer direction. The two types of columns are arranged alternately in a direction crossing the vertical transfer direction. A matrix of pixels formed in this manner enables capture of color images.
However, in the image capture device and the control method thereof according to the above-described related art, transfer is performed by sequentially passing information charges from each pixel to the next. Therefore, such related art device and method have problems in that a long period of time is required for vertical transfer and in that a high quality image cannot be obtained.
For example, in cases where no mechanical shutter is provided for the image capture section 2i, in response to light continuously incident on the pixels of the image capture section 2i, the image capture section 2i continues to generate electric charges even during a period of transfer. Such electric charges may cause noise called “smear”. The electric charge that causes such noise is referred to as “smear charge”. The amount of smear charge increases in accordance with the increase in the length of period during which information charges are transferred from the image capture section 2i to the storage section 2s. As a result, strong noise will remain in captured images.
Further, in cases where, as in the related art, only one transfer electrode of each group of transfer electrodes in the image capture section 2i is turned on to capture an image, the amount of charge that can be stored in a potential well during image capture is limited. Therefore, if, for example, the image capture section 2i receives light coming from a high brightness subject, the available sensitivity and dynamic range may be insufficient in some cases. Still further, the amount of information charge generated during a period of image capture may exceed the capacity of a potential well, resulting in a reduced dynamic range of the captured image.